In this paper, we present a new dual-level matching algorithm for 3-stage Clos-network packet switches. This algorithm is composed of two levels of matching, namely module-level matching and port-level matching. The former is responsible for finding the module-to-module matching combination according to the queueing status of the switch, while the latter is responsible for determining the port-to-port matching and internal routing assignments for cell transmission. These assignments can be computed in a pipelined manner in order to reduce the time complexity of the algorithm.
Keywords:
Gb/sec and Tb/sec switching and routing technologies