PANEL DISCUSSION | THURSDAY, AUG 26 Network Processors: Prospects for Practical Deployment James Sterbenz and Bryan Lyles   Panelists: TBA       Network processors (NPs) are embedded controllers specialised for packet processing, and fill the performance gap between hardware and general-purpose microcontroller software. They are ideally suited for switch port input processing (e.g. address lookup and packet classification) and output processing (e.g. per-flow scheduling). Due to their flexibility, they can reduce design time and costs, since it is far easier to reprogram a NP than rerun an ASIC fab and reinstall chips. Additionally, if switch vendors were to provide open programmable interfaces, NPs could be the vehicle to enable adaptive, extensible networks in which network service providers could easily deploy new protocols and services. Furthermore, the research community might finally have the ability to perform network-layer protocol research using real (non-toy) switches. NPs have received much attention over the last several years, with significant research activity, major product lines from vendors such as Intel, IBM, and Motorola; the IETF ForCES working group; and the NPF industry forum to specify hardware and software standard interfaces. Recently, however, there is reason for concern. There has been a lull in NP announcements and rollout, and one of the three major public vendors has left the market. It appears that a major switch vendor will not use commodity chips in an attempt to increase clone-resistance, and is unlikely to open programming interfaces. These trends could kill what appeared to be a promising new technology for network research and programmability. This panel will discuss these issues and trends.