The
international forum where the high-performance computing and high speed
networking communities
meet.
Hot Interconnects is the premier international forum for researchers and developers of state-of-the-art hardware and software architectures and implementations for interconnection networks of all scales, ranging from on-chip processor–memory interconnects to wide-area networks. This yearly conference is very well attended by leaders in industry and academia. The atmosphere provides for a wealth of opportunities to interact with individuals at the forefront of this field.
Themes include cross-cutting issues spanning computer systems, networking technologies, and communication protocols. This conference is directed particularly at new and exciting technology and product innovations in these areas. Contributions should focus on real experimental systems, prototypes, or leading-edge products and their performance evaluation. In addition to those subscribing to the main theme of the conference, contributions are also solicited in the topics listed below. (click here for a downloadable, printable PDF)
Call for
Papers
| • | Novel and innovative interconnect architectures |
| • | Optical interconnects |
| • | High-speed wireless interconnects |
| • | Protocols and interfaces for interprocessor communication |
| • | Survivability and fault-tolerance of interconnects |
| • | High-speed packet processing engines and network processors |
| • | Hardware protocol processing and acceleration |
| • | System and storage area network architectures and protocols |
| • | High-performance host–network interface architectures |
| • | High-bandwidth and low-latency I/O |
| • | Gb/sec and Tb/sec switching and routing technologies |
| • | Innovative architectures for supporting collective communication |
| • | Novel communication architectures to support grid computing |
| • | Architectures for high-performance distributed-computing and networked storage |
| Submission Guideline | |
| • | Papers need sufficient technical detail to judge quality and suitability for presentation. |
| • | Submit title, author, abstract, and full paper (six pages, double-column, IEEE format). |
| • | Papers should be submitted electronically at http://edas.info for Hot Interconnects 13. |
| • | Submission deadline: March 31, 2005 |
| About the Conference | |
| • | Conference held at the William Hewlett Teaching Center at Stanford University. |
| • | Papers selected will be published in proceedings by the IEEE Computer Society. |
| • | Revised versions of selected papers will be invited to a special issue of IEEE Micro magazine. |
| • | Presentations are 30-minute talks in a single-track format |
| • | Online information at http://www.hoti.org |
Tal Lavian Nortel Networks Labs and University of California at Berkeley
Fabrizio Petrini Los Alamos National Laboratory (LANL)
Technical Program Committee
Adnan Aziz University of Texas, Austin
Alan Benner IBM STSM (Server/Network Technology and Architecture)
Andrea Fumagalli University of Texas, Dallas
Andrea Bianco Politecnico di Torino
Anujan Varma University of California, Santa Cruz
Bryan Lyles Telecordia
Craig Stunkel IBM
Danny Raz Technion
Dimitrios Stiliadis Bell Labs
Doan Hoang University of Sidney
Fabio Chiussi Invento Networks
Gigi Karmous-Edwards MCNC Grid Computing and Network Services
Hans Eberle Sun
James Sterbenz UMass Amherst and Lancaster University
Jay Lepreau University of Utah
Joe Mambretti Northwestern University
John Lockwood Washington University in St. Louis
Paolo Giaccone Politecnico di Torino
Patricia Sagmeister IBM Research Zurich
Ron Brightwell Sandia National Laboratory
Reuven Cohen Technion
Sharad Agarwal Microsoft
Silvia Figueira Santa Clara University
Tom DeFanti University of Illinois at Chicago
Yuval Shavitt Tel Aviv University
Wojciech Kabacinski Poznan University of Technology, Poland
• Hasan Alkhatib
• Allen Baum
• Mark Laubach
• John Lockwood
• Daniel Pitt
• James P.G. Sterbenz
• Dimitrios Stiliadis
Finance Chair
• Maria Isabel Mejia
Local Arrangements Chair, Webmaster
• Liz Rogers
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