SPONSORED BY
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Hot Interconnects is the premier international forum for researchers and developers of state-of-the-art hardware and software architectures and implementations for interconnection networks of all scales, ranging from on-chip processor--memory interconnects to wide-area networks. This yearly conference is very well attended by leaders in industry and academia. The atmosphere provides for a wealth of opportunities to interact with individuals at the forefront of this field.
Themes include cross-cutting issues spanning computer systems, networking
technologies, and communication protocols. This conference is directed
particularly at new and exciting technology and product innovations in
these areas. Contributions should focus on real experimental systems, prototypes,
or leading-edge products and their performance evaluation. In addition
to those subscribing to the main theme of the conference, contributions
are also solicited in the topics listed below. (click
here for a downloadable, printable PDF) |
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Call for
Papers |
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Novel and innovative
interconnect architectures |
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Multicore processor interconnects |
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System-on-Chip Interconnects |
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Advanced chip-to-chip communication technologies |
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Optical interconnects |
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Protocol and interfaces for interprocessor communication |
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Survivability and fault-tolerance of interconnects |
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High-speed packet processing engines and network processors |
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System and storage area network architectures and protocols |
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High-performance host–network interface architectures |
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High-bandwidth and low-latency I/O |
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Tb/s switching and routing technologies |
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Innovative architectures for supporting collective communication |
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Novel communication architectures to support grid computing |
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| Submission
Guideline - FULL PAPERS |
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Papers need
sufficient technical detail to judge quality and suitability for
presentation. |
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Submit title,
author, abstract, and full paper (six pages, double-column, IEEE
format). |
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Papers should
be submitted electronically at http://edas.info/newPaper.php?c=5161& for Hot Interconnects
15. |
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Submission
deadline: March 31, 2007 (EXTENDED to April 9, 2007) |
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Notification of acceptance: May 15, 2007 |
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| About
the Conference |
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Conference held
at the William Hewlett Teaching Center at Stanford University. |
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Papers selected
will be published in proceedings by the IEEE Computer
Society. |
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Presentations
are 30-minute talks in a single-track format |
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Online information
at http://www.hoti.org |
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| Technical Program Committee |
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Dennis Abts, Cray, Inc.
Adnan Aziz, University of Texas, Austin
Alan Benner, IBM
Keren Bergman, Columbia University
Andrea Bianco, Politecnico di Torino
Piero Castoldi, Scuola Superiore Sant'Anna
Sarang Dharmapurikar, Nuova Systems
Hans Eberle, Sun Microsystems Laboratories
Wu-chun Feng, Virginia Tech
Juan Fernandez, University of Murcia
Ada Gavrilovska, Georgia Institute of Technology
Paolo Giaccone, Politecnico di Torino
Mitchell Gusat, IBM Zurich Research Laboratory
Ron Ho, Sun Microsystems Laboratories
Doan Hoang, University of Technology, Sydney
Jayasimha Jay, Intel
Isaac Keslassy, Technion
Venkata Krishnan, Dolphin Interconnect Solutions
Tal Lavian, Nortel Networks Labs, UC Berkeley
Bill Lin, University of California, San Diego
Olav Lysne, Simula Research Laboratory
Pankaj Mehra, HP Labs
Rami Melhem, University of Pittsburgh
Cyriel Minkenberg, IBM Zurich Research Laboratory
Gregory Pfister, IBM
Craig Stunkel, IBM, T.J. Watson Research Center
Anujan Varma, University of California at Santa Cruz
Zuoguo (Joe) Wu, Intel |
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