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Tutorial #1 Description
Tutorial #3
Tutorial type:
half-day

Title: Design of Interconnection Networks

Authors:
Dennis Abts, Cray and John Kim, Stanford University

Description: Digital systems of all types are rapidly becoming communication limited. Movement of data, not arithmetic or control logic, is the factor limiting cost, performance, size, and power in these systems. Historically used only in high-end supercomputers and telecom switches, interconnection networks are now found in systems of all sizes and all types - from large supercomputers to small embedded systems-on-a-chip (SoC) and from inter-processor networks to router fabrics. Indeed, as system complexity and integration continues to increase, many designers are finding it more efficient to route packets, not wires.

This 1/2 day tutorial for researchers in computer architecture builds an understanding of the key concepts, costs, and performance tradeoffs in the design of interconnection networks. The basics of network design are presented as three fundamental topics: topology, routing, and flow-control. As these topics are introduced, designers are kept close to the hardware by an emphasis on packaging and implementation costs. In addition, simple first-order models are developed to facilitate back-of-the-envelope estimates of performance and intuition into performance tradeoffs.

The tutorial concludes with two in-depth case studies to both demonstrate the concepts from the first sections of the tutorial and to also focus on future trends and challenges in interconnection network design. The first case study examines how the Cray BlackWidow network was designed to take advantage of increases in router pin bandwidth by making extensive use of channel slicing and high-radix routers (64ports). The second case study looks at on-chip networks -- how they present different challenges than off-chip interconnection network and how the different constraints can be exploited to create an efficient on-chip network for future many-core architectures.

Bios:
Dennis Abts is a Sr. Principal Engineer at Cray Inc. where he is a hardware architect. He joined Cray in 1997, and has contributed to the Cray X1, Cray XT3, and Blackwidow system architecture. He has a PhD from the University of Minnesota, and his research focuses on interconnection networks, cache coherence protocol, and verification methods.(www.dabts.com)

John Kim is finishing his PhD at Stanford University and will be joining Northwestern University as a research faculty in the fall of 2007. John's research interest includes computer architecture and interconnection networks. Some of his research in high-radix networks has directly impacted the interconnection networks used in the latest Cray BlackWidow network. He has also worked on the design of several microprocessors at Motorola and Intel.

 


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