| • |
Novel and innovative
interconnect architectures |
| • |
Multicore processor interconnects |
| • |
System-on-Chip Interconnects |
| • |
Advanced chip-to-chip communication technologies |
| • |
Optical interconnects |
| • |
Protocol and interfaces for interprocessor communication |
| • |
Survivability and fault-tolerance of interconnects |
| • |
High-speed packet processing engines and network processors |
| • |
System and storage area network architectures and protocols |
| • |
High-performance host–network interface architectures |
| • |
High-bandwidth and low-latency I/O |
| • |
Tb/s switching and routing technologies |
| • |
Innovative architectures for supporting collective communication |
| • |
Novel communication architectures to support grid computing |
| |
|
| Submission
Guideline |
| • |
Submission deadline: April 30, 2008 |
| • |
Notification of acceptance: May 31, 2008 |
| • |
Papers need
sufficient technical detail to judge quality and suitability for
presentation. |
| • |
Submit title,
author, abstract, and full paper (eight pages, double-column, IEEE
format). |
| • |
Industrial Forum - A special session of short invited papers will be collected by Dennis Abts and Keren Bergman. |
| • |
Papers should
be submitted electronically at http://edas.info/newPaper.php?c=6393& for Hot Interconnects
16. |
| |
|
| About
the Conference |
| • |
Conference held
at Stanford University. |
| • |
Papers selected
will be published in proceedings by the IEEE Computer
Society. |
| • |
Presentations
are 30-minute talks in a single-track format |
| • |
Online information
at http://www.hoti.org |
| |
|
| |
| |
|