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JOIN US! At Credit Suisse on
11 Madison Avenue, New York, NY
When Hot Interconnects Meets Wall Street in 2009!

Join us in August, 2009 when Credit Suisse hosts the 17th Annual IEEE Hot Interconnects Conference. Hot Interconnects is the premier international forum for researchers and developers of state-of-the-art hardware and software architectures and implementations for interconnection networks of all scales, ranging from on-chip processor-memory interconnects to wide-area networks. Leaders in industry and academia attend the conference to interact with individuals at the forefront of this field.

Themes include cross-cutting issues spanning computer systems, networking technologies, and communication protocols. This conference is directed particularly at new and exciting technology and product innovations in these areas. Contributions should focus on real experimental systems, prototypes, or leading-edge products and their performance evaluation. In addition to those subscribing to the main theme of the conference, contributions are also solicited in the topics listed below.

Building on last year's successful keynote, session, and panel on Wall Street's challenges, requirements, and solutions, in 2009 Hot Interconnects moves to Wall Street itself for the conference. We hope you can join us there. (click here for a downloadable, printable PDF)
 
Call for Papers
Novel and innovative interconnect architectures
Multicore processor interconnects
System-on-Chip Interconnects
Advanced chip-to-chip communication technologies
Optical interconnects
Protocol and interfaces for interprocessor communication
Survivability and fault-tolerance of interconnects
High-speed packet processing engines and network processors
System and storage area network architectures and protocols
High-performance host–network interface architectures
High-bandwidth and low-latency I/O
Tb/s switching and routing technologies
Innovative architectures for supporting collective communication
Novel communication architectures to support grid computing
Requirements driving high-performance interconnects
   
Submission Guideline
Submission deadline: extended to April 30, 2009
Notification of acceptance: May 31, 2009
Papers need sufficient technical detail to judge quality and suitability for presentation. Paper limit: 8 pages, two column.
Submit title, author, abstract, and full paper (eight pages, double-column, IEEE format).
Papers should be submitted electronically at http://edas.info/N7355 for Hot Interconnects 17.
   
About the Conference
Conference held at Credit Suisse in New York City, NY.
Papers selected will be published in proceedings by the IEEE Computer Society.
Presentations are 30-minute talks in a single-track format
Online information at http://www.hoti.org
   
 
   
 

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