Home| Program | Keynotes | Tutorials | Registration | Attendees | Committees | Sponsors | Previous Conferences | Contact

HOSTED BY:


PLATINUM PATRON
GOLD PATRON
SISTER
CONFERENCES

Keynote 1

Speaker

John Roese, Senior Vice President & General Manager, Huawei

Title

The Future Of Network Technology - What is Old, is New Again

Abstract

Cloud, SDN, Big data, Mobility, BYOD, etc... We are currently in an industry filled with major new technologies and architectures and each of them looks like a green field of innovation. The problem is that we have been here before many times. Our industry operates in cycles and many of the challenges we are taking on technically today at a component, system and solutions level are not as new as we like to think. As the former CTO or Nortel, Broadcom ENG, Enterasys and Cabletron over the past 20 years, I have seen these cycles and hopefully learnt some lessons. This talk will attempt to call out some of the similarity of current technical challenges with past technology work and industry efforts (some succeeded and some failed) in an effort to remind us all of our past experiences and hopefully use that history to better navigate the current challenges.

Bio

John is an industry recognized Chief Technology Officer and R&D Executive experienced in leading both focused and extremely large R&D organizations. He is also recognized as providing industry thought leadership and vision and evangelizing that future view to both customers and the wider industry. Having served as CTO for four large corporations (Nortel, Broadcom, Enterasys and Cabletron) in the telecom and IT sector over the past two decades, John has developed a broad understanding of the total ICT ecosystem and its diverse global customer base. In addition to his roles as CTO, John has been a Chief Marketing Officer and Chief Information Officer in publicly traded companies.
Currently John is Senior Vice President and General Manager of Futurewei, Huawei's North American R&D organization. Futurewei is a rapidly growing expert level R&D organization  of almost 1000 staff. Futurewei provides technical expertise to the total Huawei Company including wireless, wire line, core networking, silicon development, terminals, software and solutions. Headquartered in Silicon Valley, Futurewei has R&D sites throughout the US and Canada. Additionally, John leads the Huawei Enterprise Global Competency Center, an organization based in Santa Clara composed of key enterprise technical and business experts focused on accelerating the new Huawei Enterprise Business Group.
Prior to Huawei, John was CTO of Nortel, the senior technology and R&D executive globally for the corporation, and had functional responsibility for the 12,000 R&D staff of the company and its $1.7B annual budget. Prior to Nortel John was CTO for networking technologies at Broadcom Corporation in Irvine California. Broadcom is an industry leader in the development and creation of silicon ICs for the broader communications market. John responsibility was for switching, security, microprocessor, fabric, and other communications IC technology. Prior to Broadcom, John was CTO, CMO and CIO of Enterasys Networks based in Andover MA where he led a wide range of teams ranging from technology to global IT and Marketing. John started his career at Cabletron Systems in Rochester NH where he grew within the company ultimately becoming the global CTO.
John is a published author, holds 18 pending and granted patents in areas such as policy based networking; location based services and security, is a well-recognized public speaker and has sat on numerous boards including Comnexus, Bering Media, Smartshare Solutions, ATIS, OLPC, Blade Networks, Pingtel and the Globespan advisory board. Additionally John has had an active involvement in various standards development organizations and was a co-author of the original IEEE 802.1X standards work and IETF RFC 3580. In recent years John has been honored by the Ottawa high tech community by being named High Tech executive of the year and one of the 40 under 40 executives in the capital region. John also was one of the first senior executives in Canada to publish his thoughts on an external blog where over 10,000 unique users per month followed his thoughts and commentary.


Keynote 2

Speaker

Bob Alverson, Lead architect, Cray Inc.

Title

Cray High Speed Networking

Abstract

This talk gives an overview of high speed interconnects across all of Cray's products. Going back to the Seastar router, Cray has a torus network with high bandwidth. When combined with massively multithreading technology in uRiKA, Seastar provides direct load and store support that is unmatched today using commodity processors, especially on Big Data graph problems. The Gemini router introduced support for fine-grained load and store without requiring a custom processor. Our next generation router, known as Aries, brings that technology to the PCI Express bus, so that it can operate with a much wider range of processors. With Aries, the network topology is revamped to take best advantage of fiber optic links, which much be used for all but the shortest connections. The result is the dragonfly technology, providing high neighbor bandwidth to a large group of processors and configurable global bandwidth for system wide communication.

Bio

Robert Alverson received his B.S. in Electrical Engineering from the University of Cincinnati in 1985, and his Masters from Stanford University in 1986. He began working on the Tera Multi-Threaded Architecture in 1989, and architected and designed much of the instruction issue and floating point logic. Starting in 2002 he has began working on Massively Parallel Processor machines with Cray proprietary networks. He has been a lead architect in the design of the Seastar interconnect chip first used in the Sandia Red Storm system. He followed that with the award winning Gemini interconnect. Most recently he was a lead architect on the Aries high speed network interconnect, which introduces the first production dragonfly network.


Keynote 3

Speaker

Fuad Doany, Advanced Optical Interconnects and Packaging, IBM T. J. Watson

Title

Power-Efficient, High-Bandwidth Optical Interconnects for High Performance Computing

Abstract

High performance computing systems are driving development and large-scale deployment of parallel optical interconnects to meet the ever-increasing interconnect bandwidth requirements. We have demonstrated generations of chip-scale transceivers, or "Optochips", with record setting high-speed, high-density, and low-power performance. Optical interconnects and Si-photonic communication still present significant technical challenges for future exa-scale supercomputers. Optical interconnect technology must continue to evolve to meet future bandwidth demand, including order of magnitude improvements in cost, power, density, and reliability. Integrated low-power parallel transceivers, optical printed circuit boards and silicon based integrated photonics are potential technologies to meet these challenges.

Bio

Dr. Doany received a Ph.D. degree in physical chemistry from the University of Pennsylvania in 1984. He was a Postdoctoral Fellow at the California Institute of Technology from 1984 to 1985. He joined IBM in September 1985 at the T. J. Watson Research Center in Yorktown Heights, NY. As a Research Staff Member at IBM, he worked on laser spectroscopy, applied optics, projection displays and laser material processing for electronic packaging. Since 2000, he has focused on high-speed optical link and systems design, and advanced optoelectronic packaging. Dr. Doany has developed innovative optoelectronic packaging and integration technologies, and demonstrated integrated optical transceivers with record setting high-speed, high-density, and low-power performance. He led the design, assembly and packaging for the IBM Terabus program demonstrating Tb/sec-class waveguide-coupled transceivers and optical-PCB technology. His most recent work on holey Optochip demonstrated for the first time a VCSEL-based multimode parallel optical transceiver module providing a record terabit/sec data transfer rate. Dr. Doany is an author or coauthor of more than 100 technical papers and presentations, and holds over 55 U.S. patents.

Keynote 4

Speaker

Nick McKeown

Title

Software Defined Networks will tame complex networks

Abstract

Networks are notoriously hard to debug. Today, we only have a rudimentary set of tools available, such as ping, traceroute, tcpdump, and netflow. These tools try to reconstruct the distributed state of the network in an ad-hoc fashion, while the state is being constantly changed by a variety of complex distributed protocols. Software-Defined Networks (SDNs) make it possible - for the first time - to verify, validate, and even prove that the network is behaving correctly. SDN provides the opportunity to rethink how we write network control programs, from the development of control programs all the way to their deployment in production networks.

Bio

Nick has been a professor of electrical engineering and computer science at Stanford since 1995 where he has been very lucky to work with many brilliant students who actually do all the research. He has founded and sold several startup companies, designed major components of major products for major networking companies (not mentioning any names here), and made lots of people scratch their heads and reconsider long-held beliefs about networking more frequently than most people change clothes cars.

FOLLOW US ON:


SILVER PATRON

SPONSORED BY: